Reminder TSMC has ~60% margin, Nvidia ~70%, SMIC ~20%. Nvidia selling H200 that cost $1500 per chip for $20000. SMIC can sell $6000 Ascend chip for $20000 and still be massively profitable. Eitherway PRC controls the entire datacenter/hardware stack at this point which allows them cut costs in other components, nvm cheap power for opex which basically means their domestic 5nm is at functionally opex parity. PRC yield/production inefficiencies barely matter when western margins are cartel mark up thicc.
Techinsights only useful for verifying physics, they're questionable on actual semi economics. Reality is no one knows SMIC/Huawei yield, except HW has consistently sold way more phones than Techinsights but muh yields have suggested (i.e. rumint suggest 30% yield, sales suggest 60-70%), including when you factor in repackaged old TSMC chips. But even with max cope narrative the worst case projected yield, i.e. 4x $40 euv chip vs $160 saqp duv chip for production, PRC basically now in position to scale affordable compute because wesern margins/markup (now linked to broad economic performance) obviates PRC inefficiency - the production costs are rounding errors relative to total system costs.
The main bottleneck is production throughput, i.e. total # of DUV tools, which is matter of whether/when PRC ready to scale domestic tooling. With estimates last year their domestic solution is like 1/20 cost of ASML (again fat western margins), means PRC in next few years can scale cheap DUV multi patterning more economically than EUV regardless of process efficiency if they brrt domestic DUVs tools like they brrt everything else strategic after indigenizing. Don't matter if their yield is 1/3 of TSMC if they have 6x more capacity.
Of course western semi can still compete, but the problem is as long as PRC semi stack sanctioned, western semi can keep milking high margins which ironicly makes PRC semi competitive. If their margins wiped, historically that's also how PRC wins, by forcing western incumbants starve on lower operating profits that they can't afford to stay ahead of curve.
"TechInsights has confirmed that SMIC's N+3 node, despite achieving impressive DUV multi-patterning implementation, encounters significant yield challenges, particularly due to the aggressively scaled metal pitch.
As a result, the Huawei Kirin 9030 SoC is likely produced at an operating loss, with a significant portion of dies being discarded or used for downgraded chips."
So TSMC and friends have nothing to worry about (yet) since SMIC long hit the physical limits on what's possible to shrink using DUV.
However that's probably more than enough to ensure chips for China's strategic national security and defense needs.
> As a result, the Huawei Kirin 9030 SoC is likely produced at an operating loss
Yields are always bad at first but they improve with time and experience. Besides, stretching DUV to smaller nodes is a stopgap measure while China is working on their own EUVL technology and that research is led by the same people who developed ASML's EUV.
They aren't making any laptops or smartphones, but Russia has no problem demolishing Ukraine using weapons powered by domestic 160nm-350nm chips and vacuum tubes.
So 5nm should be more than enough for cutting edge defense applications.
https://www.reuters.com/world/china/how-china-built-its-manh...
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